1. Field of the Invention
The present invention relates to a semiconductor chip which is applicable, for example, to a chip-on-chip structure in which semiconductor chips are bonded to each other in a stacked relation and to a flip-chip-bonded structure in which a semiconductor chip is bonded to a printed wiring board with its face opposed to the printed wiring board. The invention further relates to a production process for such a semiconductor chip.
2. Description of Related Art
For size reduction and higher integration of a semiconductor device, a so-called chip-on-chip structure has been proposed in which a pair of semiconductor chips are disposed in an opposed relation and electrically connected to, each other via bumps.
Further, a wireless bonding technique has been used, by which electrodes provided on a device formation surface of a semiconductor chip are directly connected to electrodes on a wiring substrate such as of a carrier tape, and the electrodes on the wiring substrate are connected to a printed board or a ceramic board.
In either of the aforesaid techniques, it is necessary to provide electrode projections generally called “bumps” on the electrodes of the wiring substrate or on the device formation surface of the semiconductor chip.
On the other hand, a multiplicity of internal interconnections are provided in the device formation surface of the semiconductor chip to fulfill functions of the chip and, therefore, the chip should be designed so as not to complicate the routing of these interconnections.
However, there is a limit to the routing of the interconnections within the limited device formation surface, thereby hindering the size reduction and higher integration of the chip.